My second intern experience at Texas Instruments was with a design group in the low power wireless division in Baltimore, MD. The summer started with the design of a PA matching network for a major client. Then for the rest of the summer I worked on designing a time domain behavioural model of a sigma-delta modulated fractional-N PLL. This model was then used as part of a top down evaluation of a new PLL being designed for an SOC application with a low-power transceiver in the sub-GHz and 2.4GHz bands.
The design was able to accurately predict the sigma-delta quantization noise of a current PLL design. The model included the delta-sigma modulation, the jitter of each block in the PLL, and the non-linearity of the phase-frequency detector. The model was then used to evaluate the non-linearity of two different phase-frequency detector designs for use in the next generation of frequency synthesizer for a new low power SoC.
TIme-Domain Behavioral Model