A neural recording analog front end utilizing a continuous time ADC was designed. The system was designed to monitor action potential (AP) and local field potential (LFP) signals in the brain. The ASIC is intended for brain machine interfacing in both a laboratory and a clinical environment. The design is able to simultaneously monitor 4 channels from a microelectrode array embedded in the brain. The ASIC consists of a low noise amplifier (LNA) section with programmable gain and bandwidth followed by a single continuous time ADC utilizing time division multiplexing to read from 4 channels. The ADC has a power consumption that scales with activity, a major advantage for AP or spike signals that have infrequent spikes over time. I was the lead designer of the continuous time ADC. I was also in charge of putting the whole ADC and the top level of the chip together.