Analog and RF Design Engineer



uHRG Interface: Backend (GTBE) Hardware Design

  • uHRG Interface System Block Diagram

    uHRG Interface System Block Diagram

  • 3D GTBE Board Model

    3D GTBE Board Model

I am currently developing a digital backend interface for the uHRG that I am calling the Georgia Tech Back-end (GTBE).  This interface will consist of a custom data acquisition boosterpack for the TI Tiva C series launchpad.  The design includes a 24 bit ADC and a 16-bit DAC along with the appropriate supporting circuitry.  The board is designed to both drive and sense the uHRG based gyroscopes that I am working on as part of my master’s thesis in the IMEMS research group at Georgia Tech.  The board is setup for a bandwidth of 20 kHz and a sample rate of 100 kSPS to support uHRG devices with a resonant frequency up to 10kHz.

The design incorporates 8 analog inputs and 8 analog outputs.  The analog inputs utilize an ADS1278 ADC which is an 8 channel 24-bit sigma-delta ADC with up to 144 kSPS sampling rate.  Four of the inputs are differential inputs and 4 of the inputs are single-ended with appropriate ADC drivers and simple anti-aliasing filters.  The output channels use two 8-channel 16-bit ADI AD5754 DACs that are daisy-chained to form 8 analog outputs.  All 8 analog outputs have single ended Sallen- Key reconstruction filters.  Both the ADC and the DAC are driven from a 2.5v reference voltage.

Hardware Design Review:  Digital Backend Design Review v5



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